Home > News > Top Stories > Sirius Wireless Partners with S2C on Wi-Fi6/BT RF IP Verification System for Finer Chip Design

Infrastructure, Software and Tools

Sirius Wireless Partners with S2C on Wi-Fi6/BT RF IP Verification System for Finer Chip Design

Sirius Wireless, a provider of RF IP solutions, collaborated with S2C - the expert of FPGA prototyping solutions, to develop its Wi-Fi6/BT RF IP Verification System, aiming to improve work efficiency and reduce time-to-market for their clients.

The emergence of Wi-Fi6, a wireless connection technology (WCT), has unleashed unexpected potential, particularly in the IoT and intelligent hardware markets. Compared to Wi-Fi5, Wi-Fi6 enables 40% faster data transmission speeds, increased device connectivity, and improved battery life, making it widely adopted in IoT devices. Due to the specialized RF IP technology behind Wi-Fi6, only a few companies can provide such technology with Sirius being one of them.

Leveraging S2C Prodigy S7-9P Logic System, Sirius Wireless designed the Wi-Fi6/BT RF IP Verification System with AD/DA and the RF front-end AFE as separate modules. The company then used Prodigy Prototype Ready IP which are ready-to-use daughter cards and accessories from S2C, to interface with digital MAC. This design approach reduces the complexity of verification design by allowing the modules to be individually debugged. In addition, the system can serve as a demonstration platform prior to tape-out to showcase the various RF performance indicators, including throughput, reception sensitivity, and EVM.

S2C FPGA prototyping solutions greatly benefit customers in accelerating their time-to-market by shortening the entire chip verification cycle. S2C customers can conduct end-to-end verification easily by leveraging the abundant I/O connectors on the daughter boards. An example of such benefits is Sirius's development of its IP verification system. With this system, one of Sirius's customers on short-range wireless chip designs spent only two months to complete the pre-silicon hardware performance analysis and performance comparison test. The company thus saves over 30% in its production verification time and its customers' product introduction cycle.

"S2C has more than 20 years of experience in the market." said Zhu Songde, VP Sales of Sirius Wireless, "Their prototyping solutions are widely recognized around the world. With S2C's complete prototype tool chain, we can speed up the deployment of prototyping environments and improve verification efficiency."

S2C is committed to building an ecosystem with their partners. "We realize that a thriving ecosystem is crucial to market expansion." said Ying Chen, VP of Sales & Marketing at S2C, "We are working with our partners to provide better services for our customers in the chip design industry. Our partnership with Sirius Wireless is a successful story of that."

About S2C

S2C is a leading global supplier of FPGA prototyping solutions for today's innovative SoC and ASIC designs, now with the second largest share of the global prototyping market. S2C has been successfully delivering rapid SoC prototyping solutions since 2003. With over 600 customers, including 6 of the world's top 15 semiconductor companies, our world-class engineering team and customer-centric sales team are experts at addressing our customer's SoC and ASIC verification needs. S2C has offices and sales representatives in the US, Europe, mainland China, Hong Kong, Korea, and Japan.

Spotlight

More featured news

Spotlight

Related News

Enterprise Iot

Microchip Introduces New PolarFire FPGA and SoC Solution Stacks

Microchip Technology Inc. | October 09, 2023

Microchip Technology introduced nine new FPGA and SoC solution stacks designed for vertical markets. These solution stacks enable rapid deployment of intelligent edge solutions without requiring specialized expertise. Customers have praised PolarFire FPGAs for their small footprint, energy efficiency, and high performance. Microchip Technology has introduced nine new FPGA and SoC solution stacks, each tailored to meet specific requirements in vertical markets such as industrial edge, smart embedded vision, and edge communications. Microchip aims to simplify the creation of industrial and communications designs by offering solution stacks that leverage the power efficiency, security, and reliability of PolarFire FPGAs. Companies like Xenics and KAYA Instruments have cited benefits such as small form factor, power efficiency, and energy efficiency in utilizing Microchip's FPGA solution stacks for their products. In addition to the launch of its industrial edge stack and related tools earlier this year for Open Platform Communications/Unified Architecture (OPC/UA)-based IIoT applications, this increases the total number of PolarFire and SoC solution stacks to ten. For Smart Embedded Vision: H.264 compression CoaXpress among others For Industrial Edge: OPC/UA Motor control For Edge Communications: Small Form-factor pluggable optical module Software-defined radios and others Customers mentioned several factors for choosing Microchip's FPGA solution stacks. Federic Aubrun, Chief Commercial Officer (CCO) of Xenics, a developer of infrared imaging sensors with products for short-, mid-, and long-wave IR imagers, cores, and cameras, emphasized the significance of size, weight, and power considerations in thermal imaging system design. He stated that Microchip's SmartFusion and PolarFire FPGAs offered the optimal combination of a compact form factor, power efficiency, and processing capabilities while operating within a highly efficient power budget in their current and future product lines. These solution stacks provide detailed IP, reference designs, development kits, application notes, and demo guides, enabling the deployment of intelligent edge solutions. It stacks cater to the growing demand for quick deployment of intelligent edge solutions without the need for specialized technology knowledge. The solution stacks cover various areas, including H.264 compression, HDMI, serial digital interface, CoaXpress, motor control, OPC/UA, software-defined radios, USXGMII, SFP+ optical modules, and 5G ORAN, providing versatile options for different vertical markets. Another company, KAYA Instruments, designs industrial-grade imaging equipment, such as small-form-factor, low-power cameras and frame grabbers that deliver high-quality video under ordinary to extreme ambient light conditions. Michael Yampolsky, Founder and CEO at KAYA, stated, We use PolarFire FPGAs due to their compact footprint and energy efficiency. Utilizing the most up-to-date CMOS sensor technology, they enable cameras to fit in tight spaces while maintaining high quality, low noise, exceptional dynamic range, and a large feature set. FPGAs on our platform enables us to rapidly bring the most advanced vision technology to market to meet the needs of our customers. [Source: embedded]

Devices

Microchip Introduces Industry’s First Low Pin Count MCU Family With I3C Support

GlobeNewswire | September 27, 2023

With the step-function increase in data collected and transmitted from cloud-connected edge nodes, Improved Inter Integrated Circuit® (I3C®) is rapidly becoming a more sustainable solution for interfacing sensors with a high data rate and will help expand capabilities in next-generation devices. Leading the way in I3C integration, Microchip Technology (Nasdaq: MCHP) has released its PIC18-Q20 family of microcontrollers (MCUs), the industry’s first low pin count MCUs with up to two I3C peripherals and Multi-Voltage I/O (MVIO). Available in 14- and 20- pin packages as small as 3 x 3 mm, the PIC18-Q20 MCUs are a compact solution for real-time control, touch sensing and connectivity applications. The MCUs offer configurable peripherals, advanced communication interfaces and easy connection across multiple voltage domains without external components. With I3C functionality, flexible peripherals and the ability to operate on three independent voltage domains, PIC18-Q20 MCUs are well suited to be used in conjunction with a primary MCU in a larger overall system. This family of MCUs can perform tasks such as processing sensor data, handling low latency interrupts and system status reporting that the main MCU cannot perform as efficiently. While the Central Processing Unit (CPU) runs at a different voltage domain, the I3C peripheral operates from 1.0 to 3.6V. These low-power, small form factor MCUs can be used in a wide range of space-sensitive applications and markets including automotive, industrial control, computing, consumer, IoT and medical. “One of the main barriers to large-scale IoT adoption is the cost of implementing an edge node. With the PIC18-Q20 family of MCUs, Microchip is helping to break down that barrier,” said Greg Robinson, corporate vice president of Microchip’s 8-bit MCU business unit. “By introducing the industry’s first low pin count MCU with I3C we are enabling flexible, cost-effective scaling of IoT applications and embracing the new standard communications interface.” As the market shifts to demand higher performance solutions with lower power and smaller size, I3C helps designers and software developers address these potentially challenging requirements. Compared to I2C, I3C offers higher communication rates and lower power consumption, all while maintaining backward compatibility with legacy systems. The I3C and MVIO functionality, combined with Microchip’s configurable Core Independent Peripherals (CIPs), allow for lower system costs, reduced design complexity and a reduction in board space by replacing external level shifters with on-chip multiple voltage domains. To learn more about Microchip’s portfolio of PIC® MCUs, visit the website and keep up with the latest company news by following Microchip on LinkedIn, YouTube, Facebook and Instagram. Development Tools The PIC18-Q20 MCU family is supported by Microchip’s full development ecosystem of hardware and software tools, including its MPLAB® X and MPLAB Xpress Integrated Development Environments (IDEs) and MPLAB Code Configurator (MCC) Microchip’s development environment is straightforward and makes it easier to implement and generate code, allowing for a reduction in overall development time and reduced financial investment. Developers can get a quick start in evaluating I3C and MVIO capabilities on the PIC18-Q20 using Microchip’s PIC18F16Q20 Curiosity Nano Evaluation Kit—a compact, cost-effective development board for rapid prototyping.

Industrial IoT

Cadence Expands Support for 3Dblox 2.0 Standard with New System Prototyping Flows

Business Wire | September 29, 2023

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the availability of new system prototyping flows based on the Cadence® Integrity™ 3D-IC Platform that support the 3Dblox 2.0 standard. The Integrity 3D-IC Platform is fully compliant with the 3Dblox 2.0 standard language extensions, and the flows have been optimized for all of TSMC’s latest 3DFabric™ offerings, including Integrated Fan-Out (InFO), Chip-on-Wafer-on-Substrate (CoWoS®) and System-on-Integrated-Chips (TSMC-SoIC®) technologies. Through this latest collaboration between Cadence and TSMC, customers creating AI, mobile, 5G, hyperscale computing and IoT 3D-IC designs can model system prototypes to accelerate design turnaround time. Prototyping requires two different types of feasibility-checking methods across the various 3DFabric technologies—coarse-grained feasibility for thermal and EM-IR analysis, and fine-grained feasibility for die-to-die connections. Coarse-grained feasibility is enabled through a system-level tool integration with the Integrity 3D-IC Platform, featuring Voltus™ IC Power Integrity Solution and Celsius™ Thermal Solver, providing seamless prototyping for all TSMC’s latest 3DFabric configurations. Fine-grained feasibility is enabled through a silicon routing solution as well as joint collaboration on the development of a next-generation auto-router for 3DFabric technologies, which includes performance-boosting prototyping capabilities that support TSMC’s InFO and CoWoS offerings, enabled through the Integrity 3D-IC platform. The Integrity 3D-IC platform is certified for use with TSMC’s 3DFabric and the 3Dblox 2.0 specification. The platform combines system planning, implementation and system-level analysis in a single platform, and due to the shared infrastructure between Cadence 3D design and system analysis tools, customers can perform feasibility-checking much more efficiently. In addition, Cadence Allegro® X packaging solutions have been enhanced with advanced InFO-specific design rule checking (DRC). The flows supporting the 3Dblox 2.0 standard provide chiplet mirroring, which lets engineers reuse chiplet module data, improving productivity and performance. In addition, the flows provide inter-chiplet DRC through the Cadence Pegasus™ Verification System, which helps designers create an inter-chiplet CAD layer for DRC automatically. With multiple packaging options available for implementation of multi-die designs, early prototyping and feasibility studies are becoming increasingly important, said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. Through our continued collaboration with Cadence and with the addition of the latest prototyping features that support the 3Dblox 2.0 standard, we’re enabling customers to leverage our comprehensive 3DFabric technologies and the Cadence flows to significantly improve 3D-IC design productivity and time to market. “The Cadence Integrity 3D-IC Platform is the unified solution that provides an efficient way for customers to leverage the new 3Dblox 2.0 prototyping capabilities to create leading-edge 3D-IC designs using TSMC’s 3DFabric technologies,” said Dr. Chin-Chi Teng, senior vice president and general manager in the Digital & Signoff Group at Cadence. “By working closely with TSMC, customers adopting our new flows for use with 3Dblox 2.0 standard can accelerate the pace of innovation with next-generation multi-chiplet designs.” The Cadence Integrity 3D-IC Platform includes Allegro X packaging technologies and is part of the company’s broader 3D-IC offering. The offering aligns with the Cadence Intelligent System Design™ strategy, enabling customers to achieve system-in-package (SiP) design excellence. For more information on the Integrity 3D-IC platform, please visit www.cadence.com/go/integrity3dblox2.